List of Publications

 

Peer reviewed International Journals and book chapters

  • M Elhaji, A Zitouni, S Meftali, JL Dekeyser, R Tourki "A Low-Power Oriented Architecture for H. 264 variable block size motion estimation based on a resource sharing scheme", Integration, the VLSI Journal, 2012.
  • Imran Rafiq Quadri, Abdoulaye Gamatie, Pierre Boulet, Samy Meftali and Jean-Luc Dekeyser "Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: advantages, limitations and alternatives", Journal of Systems Architecture: Embedded Software Design (JSA). January 2012.
  • Chiraz Trabelsi, Rabie Ben Atitallah, Samy Meftali, Jean-LucDekeyser and Abderrazek Jemai " A model-driven approach for hybrid power estimation in embedded systems design", EURASIP Journal. Mars 2011.
  • Dekeyser J.-L., Gamatie A., Meftali S., Quadri I. R. "Models for Co-Design of Heterogeneous Dynamically Reconfigurable SoCs", In Heterogeneous Embedded Systems - Design Theory and Practice, Springer (Ed.) (2011).
  • Imran Rafiq Quadri, Majdi Elhaji, Samy Meftali and Jean-Luc Dekeyser " From MARTE to Reconfigurable NoCs: A model driven design methodology. Chapter VI in Dynamic Reconfigurable Network-on-Chip Design", Innovations for Computational Processing and Communication. Publisher: Information Science Reference. Avril 2010.
  • Imran Rafiq Quadri, Huafeng Yu, Abdoulaye Gamatie, Eric Rutten, Samy Meftali and Jean-Luc Dekeyser "Targeting Reconfigurable FPGA based SoCs using the MARTE UML profile: from high abstraction levels to code generation", Special Issue on Reconfigurable and Multicore Embedded Systems, International Journal of Embedded Systems (IJES), InderScience Publishers , March 2010.
  • Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "From MARTE to Reconfigurable NoCs: A model driven design methodology", Chapter in Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication : IGI-Global, 2010.
  • Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "A Model Driven design flow for FPGAs supporting Partial Reconfiguration", International Journal of Reconfigurable Computing, Hindawi Publishing Corporation, June 2009.
  • S. Meftali, J. Vennin, J.-L. Dekeyser "An optimized distributed simulation environment for SoC design", Annals for Micro and Nano Systems, 2006.
  • Samy Meftali, Jean-Luc Dekeyser "SoC P2P: A Peer-to-Peer IP Based SoCs Design and Simulation Tool", Virtual Entreprises and Collaborative Networks. Editions Kluwer Academic Pulishers. August, 2004. Toulouse- France
  • MEFTALI S., GHARSALLI F., ROUSSEAU F., JERRAYA A. A "Automatic code-transformations and architecture refinement, for application-specific SoC", Chapitre du livre Soc Design Methodologies. Editions Kluwer Academic Pulishers, USA, Juillet 2002.

Peer reviewed International Conferences and Workshops

    • Gilberto Ochoa-Ruiz, Sana Cherif, Ouassila Labbani-Narsis, El-Bay Bourennane, Samy Meftali and Jean-Luc Dekeyser "Facilitating IP deployment in a MARTE-based MDE methodology using IP-XACT: a XILINX EDK case study", International Conference on Reconfigurable Computing and FPGAs (Reconfig 2012), Cancun, Mexico, December 5-7, 2012.
    • Gilberto Ochoa-Ruiz, Sana Cherif, Ouassila Labbani, El-Bay Bourennane, Samy Meftali and Jean-Luc Dekeyser "Enabling partially reconfigurable IP cores parameterization and integration using IP-XACT and MARTE", IEEE International Symposium on Rapid System Prototyping, Tampere, Finland, October 2012.
    • Chiraz Trabelsi, Samy Meftali, Jean-Luc Dekeyser "Semi-distributed control for FPGA-based reconfigurable systems", September 2012. DSD Conference. Turquey.
    • Chiraz Trabelsi, Samy Meftali, Jean-Luc Dekeyser "Distributed control for reconfigurable FPGA systems: a high-level design approach", Workshop Recosoc. 2012.
    • Majdi Elhaji, Brahim Attia, Abdelkrim Zitouni, Rached Tourki, Samy Meftali, Jean-Luc Dekeyser "FeRoNoC: Flexible and extensible Router implementation for diagonal mesh topology", DASIP 2011. Tempere. Finlande.
    • Sana Cherif, Chiraz Trabelsi, Samy Meftali et Jean-Luc Dekeyser "High level design of adaptive distributed controller for partial dynamic reconfiguration un FPGA", Conference on Design and Architectures for Signal and Image Processing (DASIP 2011), Tampere, Finland, November 2-4, 2011.
    • Majdi Elhji, Abdelkrim Zitouni, Rached Tourki, Pierre Boulet, Samy Meftali and jean-luc dekeyser "Modeling Networks-on-Chip at System Level with the MARTE UML profile", 2nd Workshop on Model Based Engineering for Embedded Systems Design. March, 2011 - Grenoble, France.
    • Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "Designing dynamically reconfigurable SoCs: From UML MARTE models to automatic code generation", Conference on Design and Architectures for Signal and Image Processing (DASIP 2010), Edinburgh - Scotland, October 2010.
    • Sana Cherif, Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "Modeling reconfigurable Systems-on-Chips with UML MARTE profile: an exploratory analysis", 13th Euromicro Conference on Digital System Design (DSD 2010), Lille - France, September 2010.
    • M. Elhaji, P. Boulet, S. Meftali, A.Zitouni, J.Dekeyser & R. Tourki "An MDE approach for modeling network on chip topologies", 5th INTERNATONAL CONFERENCE ON Design & Technology of Integrated Systems in Nanoscale Era. March 2010 Hammamet, TUNISIA.
    • Majdi Elhaji, Abdelkrim Zitouni, Samy Meftali, Jean-Luc Dekeyser, Rached Tourki "A Low power and highly parallel implementation of the H.264", ISSPIT conference. 2010.
    • Chiraz Trabelsi, Samy Meftali, Rabie Ben-Atitallah, Jean-Luc Dekeyser, Smail Niar "An MDE Approach for Energy Consumption Estimation in MPSoC Design", RAPIDO 2010, January 2010, Pisa, Italy.
    • Imran Rafiq Quadri, Alexis Muller, Samy Meftali and Jean-Luc Dekeyser "MARTE based design flow for partially reconfigurable Systems-on-Chips", 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 09), Florianapolis - Brazil, October 2009.
    • Imran Rafiq Quadri, Yassin Elhillali, Samy Meftali and Jean-Luc Dekeyser "Model based design flow for implementing an Anti-Collision Radar system", 9th International IEEE Conference on ITS Telecommunications (ITS-T 2009), Lille - France, October 2009.
    • Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "Integrating Mode Automata Control Models in SoC Co-Design for Dynamically Reconfigurable FPGAs", International Conference on Design and Architectures for Signal and Image Processing (DASIP 09), Nice - France, September 2009.
    • E. Piel, R. Ben Atitallah, P. Marquet, S. Meftali, S. Niar, A. Etien, J.-L. Dekeyser, P. Boulet "Gaspard2: from MARTE to SystemC Simulation", Proceeedings of the DATE'08 workshop on Modeling and Analyzis of Real-Time and Embedded Systems with the MARTE UML profile, March 2008.
    • Imran Rafiq. Quadri, P. Boulet, S. Meftali, J.-L. Dekeyser "Using An MDE Approach for Modeling of Interconnection networks", The International Symposium on Parallel Architectures, Algorithms and Networks Conference (ISPAN 08), Sydney, Australia, May 2008.
    • Imran Rafiq. Quadri, S. Meftali, J.-L. Dekeyser "A MDE design flow for implementing Partially Dynamically Reconfigurable FPGAs", 2nd Colloque Nationale of GDR SOC-SIP, Paris, France, June 2008.
    • Imran Rafiq. Quadri, S. Meftali, J.-L. Dekeyser "High Level Modeling of Partially Dynamically Reconfigurable FPGAs based on MDE and MARTE", Reconfigurable Communication-centric SoCs (ReCoSoC'08), Barcelona, Spain, July 2008.
    • Bilel Neji, Yassine Aydi, Rabie Ben atitallah, Samy Meftali, Mohamed Abid, and Jean Luc Dekeyser "MULTISTAGE INTERCONNECTION NETWORK FOR MPSOC: PERFORMANCES STUDY AND PROTOTYPING ON FPGA", The 3rd International Design and Test Workshop, December 2008 Monastir, Tunisia.
    • Imran Rafiq. Quadri, S. Meftali, J.-L. Dekeyser "MARTE based modeling approach for Partial Dynamic Reconfigurable FPGAs", Sixth IEEE Workshop on Embedded Systems for Real-time Multimedia (ESTIMedia 2008), Atlanta, USA.
    • Yassine Aydi, Samy Meftali, Mohamed Abid, Jean-Luc Dekeyser "Design and Performance Evaluation of a Reconfigurable Delta MIN for MPSOC", 19th International Conference on Microelectronics (ICM'07), Cairo, Egypt, December 2007.
    • Y. Aydi, S. Meftali, M. Abid, J.-L. Dekeyser "Dynamicity Analysis of Delta MINs for MPSoC Architectures", STA'07 Conference, November 2007.
    • P. Marquet, S. Duquennoy, S. Le Beux, S. Meftali, J.-L. Dekeyser. "Massively Parallel Processing on a Chip", ACM International Conference on Computing Frontiers, Ischia, Italy, May 2007.
    • R. Quadri, S. Meftali, J.-L. Dekeyser "An MDE Approach for Implementing Partial Dynamic Reconfiguration in FPGAs", 16th International Workshop on IP Based System-on-chip, IP'07, Grenoble, France, December 2007.
    • R. Ben Atitallah, S. Niar, S. Meftali, J.-L. Dekeyser "An MPSoC performance estimation framework using transaction level modeling", IEEE RTCSA'2007, Daegu, Korea, 2007.
    • R. B. Atitallah, S. Niar, A. Greiner, S. Meftali, J. L. Dekeyser "Estimating Energy Consumption for an MPSoC Architectural Exploration", ARCS'06: Architecture of Computing Systems, Frankfurt, Germany, March 2006.
    • R. B. ATITALLAH, L. BONDE, S. Niar, S. Meftali, J.-L. Dekeyser "Multilevel MPSoC performance evaluation using MDE approach", International Symposium on System-on-Chip 2006, Tampere, Finland, november 2006.
    • R. B. ATITALLAH, S. Niar, S. Meftali, J.-L. Dekeyser "Accelerating MPSoC Performance Evaluation with TLM", In Advanced Computer Architecture and compilation for Embedded Systems ACACES", HIPEAC network of Excellence summer school, Laquilia, Italy.
    • S. DUQUENNOY, S. Le Beux, P. Marquet, S. Meftali, J. Dekeyser "MpNoC Design: Modeling and Simulation", 15th edition of IP/SOC, 2006.
    • J.-L. Dekeyser, P. Marquet, S. Meftali, C. Dumoulin, P. Boulet, S. Niar. "Why to do without Model Driven Architecture in embedded system codesign?", The first annual IEEE BENELUX/DSP Valley Signal Processing Symposium, SPS-DARTS 2005, Antwerp, Belgium, April 2005.
    • A. KOUDRI, S. Meftali, J.-L. Dekeyser "IP integration in embedded systems modeling", IP-SOC 2005, IP Based SoC Design Conference, Grenoble, France, December 2005.
    • S. Meftali, J.-L. Dekeyser, Isaac D. Scherson "Scalable Multistage Networks for Multiprocessor System-on-Chip Design", International Symposium on Parallel Architectures, Algorithms, and Networks, Las Vegas, Nevada, USA, December 2005.
    • J. Vennin, S. Penain, L. Charest, S. Meftali, J.-L. Dekeyser "Embedded scripting inside systemC", FDL'05, Lausanne, Switzerland, september 2005.
    • S. Meftali, A. Dziri, L. Charest, P. Marquet, J.-L. Dekeyser "Soap based distributed simulation environment for system-on-chip (soc) design", FDL'05, Lausanne, Switzerland, September 2005.
    • Jean-Luc Dekeyser, Philippe Marquet, Samy Meftali, Cédric Dumoulin, Pierre Boulet, and Smail Niar "Why to do without Model Driven Architecture in embedded system codesign?", The first annual IEEE BENELUX/DSP Valley Signal Processing Symposium, SPS-DARTS 2005, Antwerp, Belgium, April 2005.
    • Joel Vennin, Samy Meftali, Jean-Luc Dekeyser "Understanding and Extending SystemC User Thread Package to IA-64 Platform", International Workshop on IP Based SoC design, Grenoble, France, December 2004.
    • Mickael Samyn, Samy Meftali, Smail Niar, Jean-Luc Dekeyser "Performances Estimation Metamodel for MDA Based SoC Design", International Workshop on IP Based SoC design, Grenoble, France, December 2004.
    • Smail Niar, Samy Meftali "Power Consumption Aware in Cache Memory Design with SystemC", The 16 th International Conference on Microelectronics. Tunis, Tunisia. December 2004.
    • Mickael Samyn, Samy Meftali, Jean-Luc Dekeyser "MDA Based, SystemC Code Generation, Applied to Intensive Signal Processing Applications. FDL'04. September 2004. Lille, France.
    • Emilian Turbatu, Samy Meftali, Smail Niar, Jean-Luc Dekeyser "An automatic communication synthesis for high level SOC design using transaction level modeling", FDL'04. September 2004. Lille, France.
    • Samy Meftali, Jean-Luc Dekeyser "An Optimal Charge Balancing Model for Fast Distributed SystemC Simulation in IP/SoC Design", The 4th IEEE International Workshop : System-on-Chip for Real-Time Applications. July 19 - July 21, 2004. Banff, Alberta - Canada.
    • Samy Meftali, Jean-Luc Dekeyser "SoC P2P: A Peer-to-Peer IP Based SoCs Design and Simulation Tool", PRO-VE'04 : 5th IFIP Working Conference on VIRTUAL ENTERPRISES. August, 2004. Toulouse- France.
    • Samy Meftali, Joel Vennin, Jean-Luc Dekeyser "Automatic Generation of, Geographically Distributed, SystemC Simulation Models for IP/SoC Design", 46th IEEE International MWSCAS, Cairo, Egypt, December 2003.
    • Samy Meftali, Joel Vennin, Jean-Luc Dekeyser "A Fast SystemC Simulation Methodology for Multi-level IP/SoC Design", International Workshop on IP Based SoC design, Grenoble, France, November 2003.
    • GHARSALLI F., MEFTALI S., ROUSSEAU F., JERRAYA A. A "Automatic generation of embedded memory wrapper generation for multiprocessor SoC", 39th Design Automation Conference (DAC'02), New Orleans, USA, June 10-14, 2002.
    • GHARSALLI F., LYONNARD D., MEFTALI S., ROUSSEAU F., JERRAYA A. A "Unifying memory and processor wrapper architecture for multiprocessor SoC design", International Symposium on System Synthesis (ISSS'02), Kyoto, Japan, October 2-4, 2002.
    • MEFTALI S., GHARSALLI F., ROUSSEAU F., JERRAYA A. A "An optimal memory allocation for application-specific multiprocessor system-on-chip", 13th International Symposium on System Synthesis (ISSS 2001), Montreal, Canada, September 30 - October 3 2001.
    • MEFTALI S., GHARSALLI F., ROUSSEAU F., JERRAYA A. A "Automatic code-transformations and architecture refinement, for application-specific SoC", IFIP International Conference on Very Large Scale Integration - The Global System on Chip Design & CAD Conference (VLSI-SOC 2001), Montpellier, France, December 3-5 2001.

      • Peer reviewed National Conferences / Poster Presentations

      • Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "MARTE based design approach for targeting Reconfigurable Architectures", 2nd Embedded Systems Conference - ESC'09, Alger - Algeria, May 2009.
      • Imran Rafiq Quadri, Samy Meftali and Jean-Luc Dekeyser "From MARTE to dynamically reconfigurable FPGAs : Introduction of a control extension in a model based design flow", Research Report RR-6862, INRIA, March 2009.
      • Samy Meftali, Joel Vennin, Jean-Luc Dekeyser "Methodologie de simulation multi niveaux, pour la conception de systemes monopuces en SystemC", CISC'04. September 2004. Jijel, Algeria.
      • Samy Meftali, Mickael Samyn, Jean-Luc Dekeyser "Approche MDA, avec plateforme SystemC, pour la conception de systemes monopuces dedies au traitement de signal intensif", CISC'04. September 2004. Jijel, Algeria.
      • Samy Meftali "Memory Architectures Exploration in MP-SoC Design", PhD Forum at VLSI SoC 2003, Darmstadt, Germany, December 2003.
      • Samy Meftali "Shared Memory Architecture Design for Application-Specific Multiprocessor Systems-on-Chip", PhD Forum at DAC 2002, New Orleans, USA, June 2002.